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# | File   :                     README                         |
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# | Author :                 Jacomme Ludovic                    |
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This directory contains hierarchical VHDL descriptions of a synchronous 8 bits 
greatest common divisor (with a finite state machine and a data part).
It contains also the associated stimuli file, and configuration file for IO
placement (used during the Place and Route step).

The Makefile set environement variables properly and run Alliance tools, 
following each step of the design flow from VHDL up to real layout in a
 pseudo 0.35 techno.

The environement variable ALLIANCE_TOP has to be set.

