SMP Simulation
Author: Bryce Denney

# Symmetric Multiprocessor (SMP) Simulation

Bochs can now simulate an SMP machine when you use "--enable-processors=N" in the configure command. SMP support was added by Bryce Denney, who was very interested in watching a multiprocessor operating system work at a low level. It should also be helpful to operating system developers who are writing SMP drivers, or just for users who want to test drive an SMP machine to see what it looks like.

It is important to understand that configuring bochs for 4 processors will make your single-threaded applications run faster in general! On the contrary, it has to spend time simulating idle processors as well as the ones doing your task. The point is to simulate an SMP system, not to speed up a uniprocessor application.

What was required to make SMP work in Bochs? (Note that only Linux 2.2 has been tested so far.)

- local APIC on each processor with timer
- one I/O APIC model
- implement RDTSC feature (read time stamp counter)
- modifications to rombios.c to add a data structure called the Intel Multiprocessor Configuration. An SMP-aware operating system probes BIOS memory to find the structure, which contains information about how many processors, their IDs, interrupt sources, etc.

What needs to be done to improve SMP support?

- still needs work on rombios.c to allow you to configure the number of processors in the .bochsrc. Presently you have to choose the number of processors at compile time.
- debugger support is still limited. For example, you can set breakpoints, but you can't specify which processor you want to set the breakpoint for.
- test on SMP systems other than linux 2.2.14
- several parts of the APIC model which weren't needed for linux 2.2.14 are not implemented yet and cause a panic. If you boot linux 2.4.3 for example, it says "panic: cluster model addressing not implemented". See this bug report for tips on getting linux 2.4 to boot. (The apic is not the only problem!)
- A number of people have suggested using threads to simulate each CPU in a different thread. Then on a real SMP machine, the threads can execute in parallel. This is a great idea, but it's not done at present.